1. Field of the Invention
The present invention relates to electronic devices, and in particular, to assembly of electronic devices.
2. Description of Related Art
FIG. 1 illustrates a flip-chip die attachment process wherein an integrated circuit (IC) die 10 is mounted to a die carrier or substrate 12 so as to form an IC package 14. An array of die metal bumps 16 are attached to die bonding pads (not shown) located on the input/output (I/O) side of the die 10. Also, a matching array of substrate solder bumps 18, typically with a lower melting point than the die metal bumps 16, are attached to substrate bonding pads (not shown) on the substrate 12. With use of a die attachment or bonding tool (not shown), the die 10 is aligned so that the die metal bumps 16 of the die 10 are facing the substrate solder bumps 18 of the substrate 12. After being aligned, the die attachment tool moves the die 10 in a vertical direction toward the substrate 12 to apply compressive forces or pressures between the bumps 16 and 18. This vertical direction is indicated by a directional arrow 20. By reflowing the solder, the die metal bumps 16 and the substrate solder bumps 18 simultaneously joined to form solder joints (i.e., solder connections) that interconnect the die 10 to the substrate 12. More specifically, the substrate solder bumps 18, with their lower melting point, may wet the die metal bumps 16 to form the solder joints, which in turn form a plurality of electrical and mechanical interconnections between the die 10 and substrate 12. These solder joints are commonly referred to as Control Collapsed Chip Connection (C4) bumps, regardless of whether the IC package 14 is a ball grid array (BGA) package with solder balls on the landside of the substrate 12 or pin grid array (PGA) package with pins on the landside of the substrate 12. These solder balls or pins are used to interconnect the IC package to a printed circuit board (not shown).
With some flip-chip IC packages, a no-flow underfill material 22, used for mechanical support and electrical insulation, is interposed between the die 10 and the substrate 12. Additionally, the no-flow underfill material 22 may include conductive fillers 24, which may be either solid or liquid materials. One issue with use of no-flow underfill material is poor solder joint quality, which may result from non-wets, bump misalignments, and entrapment of underfill material and/or its fillers. Entrapment of the underfill material and/or its filler within the solder joint may have a severe impact to solder joint's current carrying capability.
Current no-flow underfill technology relies solely on compressive forces to expel underfill material from between bumps during solder joint formation using the die attachment tool. A “squeeze flow”, which is produced by these compressive forces, is sufficient to remove some of the material from between the bumps before connection is made. However, this process is not generally capable of completely removing the underfill material from between the bumps. More specifically, this technology utilizes compression forces during the solder re-flow process in order to physically repel and squeeze the underfill material from the interconnect area between the die 10 and substrate 12. However, there are limitations on how much force may be applied on the die 10 before there may be a negative impact to silicon structures, such as damage to the interlayer dielectric (ILD), the thin film capacitor (TFC), the polylmide and/or like structures and there may also be the formation of bump shorts and the like.